master/slave align_done in phy_to_aib.sv

[nij-intel]

this should use align_done instead of *transfer_en and mac_rdy

ifdef AIB_DATA_DELAY ifdef MS_AIB_GEN1 // Master ver1 dont have transfer_en Terry Fix ??
assign master_align_done = &fs_mac_rdy_d[AIB_CH_CNT-1:0]; else
assign master_align_done = &ms_rx_transfer_en_d[AIB_CH_CNT-1:0]; endif
assign slave_align_done = &sl_rx_transfer_en_d[AIB_CH_CNT-1:0]; else
ifdef MS_AIB_GEN1 // Master ver1 dont have transfer_en Terry Fix ?? assign master_align_done = &aib_mac_if_m0.fs_mac_rdy[AIB_CH_CNT-1:0];
else assign master_align_done = &aib_mac_if_m0.ms_rx_transfer_en[AIB_CH_CNT-1:0];
endif assign slave_align_done = &aib_mac_if_s0.sl_rx_transfer_en[AIB_CH_CNT-1:0];
`endif

[johna-eximiusdesign]

This is a duplicate of the issues tracked in #43

[johna-eximiusdesign]

Removed from within phy_to_aib.sv in 0.9.0.

[nij-intel]

Will close this once I verify #43 in the next update

[johna-eximiusdesign]

Please check this again in 0.9.1.

[nij-intel]

Fixed in 0.9.1