CHETHAN KUMAR H B's repositories
puf_rng_64_bit
This project implements a 64-bit Ring oscillator based PUF on Arty A7 FPGA
Implementation-of-DTBDM-Decision-Tree-Based-De-noising-Method-on-MAX-10-Nios-II-Embedded-Evaluation
This project is aimed at implementation of a decision-tree-based impulse noise detector to detect the noisy pixels, and an edge-preserving filter to reconstruct the intensity values of noisy pixels (”ieeexplore.ieee.org/iel5/12/6471716/06122015.pdf”) on Max10 soc .
Sound_Display_Entertainment-System_on_Baysys3
The SDE system, by interfacing the Basys 3 Development Board with the PmodMIC3 and the PmodOLED. The system will capture and digitize the audio signal input from the microphone on the PmodMIC3. The data will then be processed by the FPGA, for display on the PmodOLED