chathhorn / ReWire

Experimental compiler for a subset of Haskell to VHDL

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ReWire

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ReWire is an experimental compiler for a subset of Haskell to VHDL, suitable for synthesis and implementation on FPGAs. ReWire enables a semantics-directed style of synchronous hardware development, based on reactive resumption monads. See the online documentation for more information.

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Experimental compiler for a subset of Haskell to VHDL

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Language:VHDL 51.6%Language:Haskell 48.4%Language:Shell 0.0%