ChanningCh's repositories
ADI_linux
Linux kernel variant from Analog Devices; see README.md for details
chipscopy
ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communication Framework) ChipScope Server (cs_server).
verilog-uart
Verilog UART
verilog-ethernet
Verilog Ethernet components for FPGA implementation
modbus_crc_verilog
FPGA纯逻辑实现modbus通信
DisplayPort
DisplayPort IP-core
FPGA-RMII-SMII
An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII，用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。
PYNQ
Python Productivity for ZYNQ
verilog-i2c
Verilog I2C interface for FPGA implementation
kronos
Kronos is a 3-stage in-order RISC-V RV32I_Zicsr_Zifencei core geared towards FPGA implementations
Genesys_ZU_MIPI_PCAM
Imaging application using MIPI and DisplayPort to process image
DisplayPort_Verilog
A Verilog implementation of DisplayPort protocol for FPGAs
LianJiaSpider
链家网爬虫
stm32
STM32 stuff
bios_first
My first DSP/BIOS system usage example
MPU6050-ChibiOS
Code based on i2cdevlib by Jeff Rowberg