Chandan Iswar Palai's repositories
SystemVerilog-Assertions
Examples of assertions used in SystemVerilog. Made for udemy course by M. Ramdas
FPGA-SoC-Linux
FPGA+SoC+Linux Boot Images (Xilinx:Zynq-Zybo Altera:de0-nano-soc)
hailfire-fpga
HDL for the FPGA in the Hailfire robot, using MyHDL and Quartus
OpenCL
This project contains code developed by a research team at University of Colorado,Boulder and Embry Riddle Aeronautical University to explore FPGA and GP-GPU co-processor power efficiency for continous transform 3D mapping and sensor fusion. Please use at your own risk. We are sharing so that other researchers and developers can recreate our results and make suggestions to improve and extend the benchmarks over time. The results we obtained were documented in the SPIE Sensor and Technologies paper: S. Siewert, V. Angoth, R. Krishnamurthy, K. Mani, K. Mock, S. B. Singh, S. Srivistava, C. Wagner, R. Claus, M. Demi Vis, “Software Defined Multi-Spectral Imaging for Arctic Sensor Networks”, SPIE Algorithms and Technologies for Multipectral, Hyperspectral, and Ultraspectral Imagery XXII, Baltimore, Maryland, April 2016. This repository includes FPGA codes
riscv_vhdl
VHDL implementation of the RISC-V System-on-Chip based on bare "Rocket Chip".
UVM-sample-codes
This contains UVM basic example codes
aes-fpga
AES implementation on FPGA
arduino
FPGArduino
Brew
Quartus Verilog Brew to test with float fix and multiplication
fpga-drive-aximm-pcie
Example design for FPGA Drive using the AXI Memory Mapped to PCI Express Bridge IP
freedom-e-sdk
Open Source Software for Developing on the Freedom E Platform
linuxcnc
LinuxCNC controls CNC machines. It can drive milling machines, lathes, 3d printers, laser cutters, plasma cutters, robot arms, hexapods, and more.
myhdl
The MyHDL development repository
ogr2osm
UVM's Rewrite of ogr2osm
pcie5_phy
PCIE 5.0 Graduation project (Verification Team) under supervision of Mentor Graphics
Practical-UVM-Step-By-Step
This is the main repository for all the examples for the book Practical UVM
robinsun-fpga
Code for the FPGA of the Robinsun robot.
samplecode
This repository contains sample code for different Numato Lab products
SystemVerilog-Basics
Contains basic sample codes for SystemVerilog.
SystemVerilogAssertions
Examples and reference for System Verilog Assertions
SystemVerilogReference
training labs and examples
test1
trial
uvm-tutorial-for-candy-lovers
Source code repo for UVM Tutorial for Candy Lovers
uvmprimer
Contains the code examples from The UVM Primer Book sorted by chapters.
Verilog-sample-codes
Repository for basic and advanced Verilog sample codes created for CDAC VLSI 2016 course
verilog_systemverilog.vim
Verilog/SystemVerilog Syntax and Omni-completion
VHDL-example-codes
VHDL lab codes created for CDAC VLSI 2016 course