carlosFPGA / PYNQ_Composable_Pipeline

Composabe Pipeline

Home Page:http://www.pynq.io/

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Composable Pipeline

The Composable pipeline is an overlay with a novel and clever architecture that allow us to adapt how the data flows between a series of IP cores.

The key characteristic of a composable overlay is an AXI4-Stream Switch, which plays the same role as an old telephone switchboard. The AXI4-Stream Switch provides the runtime routing of how data flow from one IP core to another.

On top of that, the composable overlay includes Dynamic Function eXchange DFX regions that brings new functionality to the design at runtime.

The combination of these two technologies plus a pythonic API, built on top of pynq, provide an unprecedented flexibility.

The composable overlay architecture of a composable video overlay for the PYNQ-Z2 is shown in the image below

Clone this repository

git clone https://github.com/Xilinx/PYNQ_Composable_Pipeline.git --recursive

Note that this project depends on the Vitis Accelerated Libraries and PYNQ

Install composable pipeline on your board

git clone https://github.com/Xilinx/PYNQ_Composable_Pipeline
pip install PYNQ_Composable_Pipeline/
pynq-get-notebooks composable-pipeline -p $PYNQ_JUPYTER_NOTEBOOKS

The notebooks will be delivered into the folder /home/xilinx/jupyter_notebooks

Supported boards PYNQ-Z2 and PYNQ-ZU

Rebuild composable pipeline from scratch

To rebuild the composable pipeline you need Vitis 2020.2 installed. Navigate to one of the supported boards folder and run make, only steps for Linux are provided.

Licenses

Copyright (C) 2021 Xilinx, Inc

SPDX-License-Identifier: BSD-3-Clause

Third-party license

Binary Files License

Pre-compiled binary files are not provided under an OSI-approved open source license, because Xilinx is incapable of providing 100% corresponding sources.

Binary files are provided under the following license


Copyright© 2021 Xilinx

About

Composabe Pipeline

http://www.pynq.io/

License:BSD 3-Clause "New" or "Revised" License


Languages

Language:Tcl 60.0%Language:Jupyter Notebook 17.6%Language:Python 14.4%Language:Verilog 3.9%Language:C++ 3.7%Language:Makefile 0.4%