bunnie

watchmap

My scripts to visualize data off my smartwatch

netlist-checker

EDIF netlist checker tool

iris-hw

CAD files for IRIS hardware designs

espeak-embedded

Generates an espeak executable for running on an embedded device

iris-stitcher

Stitching scripts for IRIS

iris-controller

jubiris

IRIS customizations for Jubilee

usb-test-suite-testbenches

betrusted-soc

Betrusted main SoC design

espeak-ng

eSpeak NG is an open source speech synthesizer that supports more than hundred languages and accents.

fpga_pio

An attempt to recreate the RP2040 PIO in an FPGA

iris-focus

Piezoelectric focus driver

iris-layout

Some scripts to analyze IRIS images against layout data

mixaqubes

Just messing around.

pre_docs

scan-chains

xous-engine-25519

scratchwork on a 3rd-party API for the Betrusted/Precursor 25519 engine

xous-test-server

Just a test server for Xous

bazel-on-arm

Build the open source build tool Bazel for ARM on the Raspberry Pi

bdf2bmp

output all glyphs in a BDF font to a BMP image file

easyblink

blinky library built on top of the blinkt Rust library

genconstants-25519

gtkwave

GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.

jubilee

jubilee source files; for the docs, see:

litex

Build your hardware, easily!

litex_verilog_axi_test

Integration test of Verilog AXI modules (https://github.com/alexforencich/verilog-axi) with LiteX.

pythondata-cpu-vexriscv

Python module containing verilog files for vexriscv cpu (for use with LiteX).

ring-xous

A terrible patch to allow client-side TLS. Probably insecure for server applications.

verilog-axi

Verilog AXI components for FPGA implementation

xous-core

The Xous microkernel