buloruabutata

riscv-arch-test

AISystem

AISystem 主要是指AI系统，包括AI芯片、AI编译器、AI推理和训练框架等AI全栈底层技术

start-ai-compiler

Start AI Compiler

swin-transformer-cpp

Swin Transformer C++ Implementation

C-Programing-Language

浙江大学《C语言程序设计》第四版——何钦铭 颜晖（教材源码、PTA练习题、实验、教师用书、课件资源）

csapp

Repos for learning csapp

one-transformer

a tutorial for training a PyTorch transformer from scratch

Bergamot

An exquisite superscalar RV32GC processor.

SpinalHDL

Scala based HDL

yolov5-fpga-hardware-acceleration

网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR

Vitis-AI

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

CNN-FPGA

Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

softmax

Verilog implementation of Softmax function

PVS464

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

gpt_academic

为GPT/GLM等LLM大语言模型提供实用化交互接口，特别优化论文阅读/润色/写作体验，模块化设计，支持自定义快捷按钮&函数插件，支持Python和C++等项目剖析&自译解功能，PDF/LaTex论文翻译&总结功能，支持并行问询多种LLM模型，支持chatglm3等本地模型。接入通义千问, deepseekcoder, 讯飞星火, 文心一言, llama2, rwkv, claude2, moss等。

RISC-V-On-PYNQ

RISC-V Integration for PYNQ

PynqDocs

PYNQ学习资料

vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

FreeRTOS-RISCV

An example to test srv32 RISC-V core on FreeRTOS

pynq_api

C API drivers for PYNQ FPGA board

e200_opensource

The Ultra-Low Power RISC Core

PYNQ

Python Productivity for ZYNQ

GLaDOS

status of GLaDOS

riscv-tests

PYNQ_Workshop

rars

RARS -- RISC-V Assembler and Runtime Simulator

timeshaft

软工作业