A toy, simple an playful ZERO-KNOWLEDGE / STARK based ZKVM to showcase the intricacies of | Trace Generation | Cross-Table Lookups | RangeChecks | Proof Composition.
- Single byte-only addressible memory of range:
0x00to0xFF. All addresses are Read-Write (no Read-only memory). - No Stack, No Heap, No Allocator.
- CPU instruction set described below, 2 registers:
r0,r1each capable of storing one byte at a time. - Harvard CPU architecture, no self-modifying code.
This VM intends to support the smallest subset of instructions to describe the major design elements of ZKVMs with as less of fluff as possible. For this, the following instructions are chosen to be implemented:
- ADD:
ADD r1 r2Adds registersr1andr2such thatr1 = r1 + r2. - SUB:
SUB r1 r2Subtracts registersr1andr2such thatr1 = r1 - r2. - MUL:
MUL r1 r2Multiplies registersr1andr2such thatr1 = r1 * r2. - DIV:
DIV r1 r2Divides registersr1andr2such thatr1 = r1 / r2. - SHL:
BSL r1 r2BitShiftsr1byr2to the left. - SHR:
SHR r1 r2BitShift analog towards the right. - JZ:
JZ r1 0x10Jump to0x10if value inr1is zero. - JNZ:
JNZ r1 0x10Jump to0x10if value inr1is not zero. - LB:
LB r1 0x10Loads a single byte at0x10into registerr1. - SB:
SB r1 0x10Stores a single byte in registerr1to memory location0x10.
Since our instruction set and VM description is bespoke, we do not have compilation toolkit from any programming language for PixieZKVM. All programs are built by hand in assembly format.
Clone and test:
git clone git@github.com:supragya/PixieZKVM.git
cargo test