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boztalay / OZ-3

A small RISC processor, designed in Logisim and implemented on a Xilinx FPGA using VHDL

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OZ-3

A small RISC processor, designed in Logisim and implemented on a Xilinx FPGA using VHDL

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A small RISC processor, designed in Logisim and implemented on a Xilinx FPGA using VHDL

License:MIT License

Languages

Language:VHDL 83.4%Language:C++ 16.4%Language:Tcl 0.2%