black-pigeon

black-pigeon

Geek Repo

Location:Shanghai, China

Home Page:black-pigeon.github.io

Twitter:@BlackPigoen

Github PK Tool:Github PK Tool

black-pigeon's repositories

antsdr-fw

ANTSDR Firmware

Language:ShellLicense:NOASSERTIONStargazers:5Issues:0Issues:0

antsdr_standalone

Standalone application based on ADI hdl and no_OS for ANTSDR.

Language:CStargazers:1Issues:0Issues:0

antsdr_uhd_project

This repo contains both the uhd host driver and firmware for microphase antsdr devices.

Language:CLicense:GPL-3.0Stargazers:0Issues:0Issues:0
Language:HTMLStargazers:0Issues:1Issues:0

buildroot_antsdr

Buildroot is a simple, efficient and easy-to-use tool to generate embedded Linux systems through cross-compilation. Forked from https://git.busybox.net/buildroot/

Language:MakefileLicense:NOASSERTIONStargazers:0Issues:0Issues:0

cocotb_primer

understanding of cocotb (In Chinese Only)

License:MITStargazers:0Issues:0Issues:0

corundum

Open source FPGA-based NIC and platform for in-network compute

Language:VerilogLicense:NOASSERTIONStargazers:0Issues:0Issues:0

dma_ip_drivers

Xilinx QDMA IP Drivers

Language:CStargazers:0Issues:0Issues:0

DSP-RTL-Lib

RTL Verilog library for various DSP modules

Language:VerilogLicense:BSD-2-ClauseStargazers:0Issues:0Issues:0

dsp_module

some basic dsp module for myself

Language:VerilogLicense:GPL-3.0Stargazers:0Issues:1Issues:0

hdl_antsdr

HDL libraries and projects

License:NOASSERTIONStargazers:0Issues:0Issues:0

linux_antsdr

Linux kernel variant from Analog Devices; see README.md for details

Language:CLicense:NOASSERTIONStargazers:0Issues:0Issues:0

maia-sdr

Maia SDR is an open-source FPGA-based SDR project focusing on the ADALM Pluto

Language:RustStargazers:0Issues:0Issues:0

openofdm

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

License:Apache-2.0Stargazers:0Issues:0Issues:0

openwifi

open-source 802.11 WiFi baseband chip/FPGA design

License:AGPL-3.0Stargazers:0Issues:0Issues:0

openwifi-hw

FPGA/hardware design of openwifi

Language:VerilogLicense:AGPL-3.0Stargazers:0Issues:0Issues:0

openwifi-hw-img

Store the openwifi FPGA img (.xsa .ltx) and the related git info

License:AGPL-3.0Stargazers:0Issues:0Issues:0
Language:PythonStargazers:0Issues:0Issues:0

riffa

The RIFFA development repository

Language:VerilogLicense:NOASSERTIONStargazers:0Issues:0Issues:0

sparsdr

sparsdr

Language:PythonStargazers:0Issues:0Issues:0
Stargazers:0Issues:1Issues:0

u-boot-xlnx_antsdr

The official Xilinx u-boot repository

Language:CStargazers:0Issues:0Issues:0

zynq_timestamping_antsdr

Open source Zynq timestamping implementation from Software Radio Systems (SRS)

Language:VHDLLicense:AGPL-3.0Stargazers:0Issues:0Issues:0