This GitHub repository contains simulation files in LTSpice for the two full adder circuits analyzed in terms of delay performance and power dissipation as a part of an academic research. For more information, please refer to the paper.
Abstract - This research presents a comparative analysis between an XOR-XOR based full adder cell and a fully complementary CMOS circuit. The two full adders have been reviewed and the design differences have been discussed. Subsequently, both circuits have been simulated in LTSpice by using model parameters for BS170 and BS250 MOS transistors. The aim of the research is to reveal the performances of the circuits through delay and power dissipation analyses. In order to get more precise results, LTSpice commands have been used to measure both propagation delays and power dissipations. The analysis has been conducted for 16 different input combinations in both circuits. The proposed full adder has been compared with the fully complementary CMOS circuit. The results show that the standard circuit has lower propagation delays and lower power dissipation levels than that of the proposed circuit. However, it has been found that the main reason of the unsatisfactory performance of the proposed circuit is the pull-down resistors that are added to the circuit as a part of necessary modifications.
You need LTSpice installed to open the files. LTSpice XVII was used for this project. Refer to the paper for further information.
- Bilal Kabaş
This project is licensed under the GNU Affero General Public License.