bg193 / vscale_soc

VScale RiscV System On Chip

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vscale_soc

VScale RiscV Wishbone System On Chip

Most cores and tools take from fusesoc and orpsoc.

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VScale RiscV System On Chip

MIT License

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Language:Verilog 82.6%Language:Python 6.7%Language:Stata 6.5%Language:SystemVerilog 2.1%Language:Makefile 0.7%Language:Coq 0.6%Language:Forth 0.5%Language:C 0.2%Language:Shell 0.1%Language:Tcl 0.0%