BeagleV Starlight is a Linux-capable RISC-V 64-bit dev board.
A beta prototype version has been sent to a limited number of upstream developers for software enablement. This beta prototype uses the StarFive JH7100 SoC. The hardware design is not final and modifications are expected.
Please join our public BeagleV forum for updates on the official product launch of the BeagleV Starlight with distributors.
- Please open hardware issues in this repository
- This repository has the PCB design of the pre-production beta version
BeagleV v0.9.DSN: Cadence OrCAD schematicBeagleV_15.brd: Cadence Allegro board layout- Cadence Allegro Viewer can be downloaded from Cadence
- compressed in zip file to be under 100MB
LIBRARY1.OLB: Cadence OrCAD schematic libraryBEAGLE V.opj: Cadence OrCAD project fileBeagleV_v0.9.pdf: OrCAD schematic exported to PDF
- secondBoot: first-stage bootloader on SPI flash
- ddrinit: initializes DDR memory and copies opensbi+uboot to DDR
- OpenSBI v0.9: compiled with u-boot as payload
- U-Boot 2021.04
- Linux 5.10 used by Wei Fu for Fedora image
- Linux 5.12 by @esmil
- Linux 5.13 by @geertu
- Fedora RISC-V image by Wei Fu
- Buildroot by @tpetazzoni
- Yocto/OpenEmbedded by Khem Raj
- bootloader recovery utility by @kprasadvnsi
- Renode
- Getting Started with BeagleV™ - Starlight
- How to Make File System, Compile u-boot and Linux Kernel
- Update bootloader, ddr init boot, u-boot and Recover bootloader
- BeagleV public group
- BeagleV beta developer group
- note: this is private forum for beta developers, contact drew@beagleboard.org
- CERN-OHL-P (permissive)
- More information on CERN Open Hardware License (OHL) v2
- Spelling should be BeagleV not Beagle-V
- BeagleV is BeagleBoard.org Foundation's name for RISC-V boards
- The board name is BeagleV Starlight for this board.
- The board that limited number of developers have thus far received is beta version of the BeagleV Starlight
- This FAQ describes difference between beta and production.
- Board vendor is BeagleBoard.org Foundation
- BeagleV Starlight is manufactured by Seeed Studio for BeagleBoard.org Foundation
- Refer to
"^beagle,.*"in vendor-prefixes.yaml
- StarFive SoC: VIC renamed to JH
- The beta BeagleV Starlight board has StarFive JH7100 SoC
- StarFive had referred it internally as VIC7100 but the public name is JH7100
- StarFive has renamed datasheet to JH7100
- There are still many references to VIC and VIC7100 instead of JH7100 which will be cleaned up
- StarFive JH7100 versus JH7110
- The beta BeagleV Starlight board has the StarFive JH7100
- StarFive JH7110 is mass production chip which will be used in future BeagleV Starlight boards
- JH7110 upgrade from 2x to 4x U74 cores and adds PCIe and GPU
- Recommendation is to use
beagle,beaglev-starlight-jh7100andbeagle,beaglev-starlight-jh7110to differientate between the board versions
- SiFive cores in the StarFive SoC:
- StarFive JH7100 SoC has 2x SiFive U74-MC
- StarFive JH7110 SoC will have 4x SiFive U74-MC
- Datasheet: SiFive U74 Core Manual