Add AXI/APB BFM and UVM RAL generator
taichi-ishitani opened this issue · comments
Hi,
I'm developing some OSS VIP and tool.
Could you please add my works to your list?
- tvip-axi
- Bus function model for AMBA AXI protocol
- Written in SystemVerilog and UVM
- https://github.com/taichi-ishitani/tvip-axi
- License: Apache-2.0
- tvip-apb
- Bus function model for AMBA APB protocol
- Written in SystemVerilog and UVM
- https://github.com/taichi-ishitani/tvip-apb
- License: Apache-2.0
- RgGen
- Code generator tool for CSR (configuration and status register)
- Generating UVM RAL model from register map specification
- Written in Ruby
- https://github.com/rggen/rggen
- License: MIT
- Code generator tool for CSR (configuration and status register)
Hi, thanks a lot for submitting these :)
Thanks for adding my works!