azonenberg / openfpga

Open FPGA tools

azonenberg/openfpga Issues

cheat code support for the pocket cores
Closed 5 months ago3
Update README.md to point at Libera.chat
Updated 3 years ago
Unable to build openfpga on ubuntu 20.04 - Segmentation fault
Updated 4 years ago
xc2jed2json outputting nonsense
Updated 4 years ago4
Need ZIA map for >32 macrocell devices
Updated 4 years ago1
xc2par: Panic when building for xc2c64a-7-vq100
Closed 5 years ago2
certain impossible loc constraints cause crash rather than error
Updated 5 years ago
sometimes it's possible for multiple IOs to end up sharing an XOR
Closed 5 years ago1
'called `Option::unwrap()` on a `None` value' -- bug 4 from #132
Closed 5 years ago2
invalid path ![XOR|IOBUFE] -> FF -> IOBUFE -- bug 1 from #132
Closed 5 years ago1
clock input is not a P-term or global clock -- bug 2 from #132
Closed 5 years ago1
somehow incomplete if/else combinatorial outputs generated a PTC/CTC error
Closed 5 years ago5
xc2par: assigning an output pin to a constant value crashes
Closed 5 years ago1
xc2par fails on recent Yosys json output
Closed 5 years ago2
we should have ci/cd that isn't hosted by me
Updated 5 years ago
error: struct field shorthands are unstable (see issue #37340)
Closed 6 years ago1
this commit makes rust release builds suddenly take 20+GB
Closed 6 years ago1
[macOS] Investigate if this HIDAPI fix affects us
Updated 7 years ago
Refactoring: xc2bit reftests should be in the tests/ directory
Closed 7 years ago1
Create Vivado tcl import/export tool (kinda like XDL)
Updated 7 years ago
Fix hidapi error handling
Updated 7 years ago
build system somehow finds yosys not on path, and then fails to run it
Closed 7 years ago15
Add a debug helper to dump xbpar graphs
Updated 7 years ago
TFF extraction
Updated 7 years ago
Add sim support for GP_*OSC output dividers
Updated 7 years ago
Add sim support for GP_EDGEDET in cells_sim_ams
Updated 7 years ago
Add simulation model for GP_SPI in cells_sim_digital
Updated 7 years ago
TODO: What should we do about inferring Coolrunner-II latches?
Updated 7 years ago
Resource utilization view does not correctly count GP_PGEN cell
Updated 7 years ago
Bikeshed: how to ergonomically implement HSTL/SSTL
Updated 7 years ago
Consider vendoring vpi_user.h
Updated 7 years ago4
Try to come up with a code generation tool for serializing/deserializing bitstream data
Updated 7 years ago1
Carefully test interaction between set/reset/enable/DDR on Coolrunner2
Updated 7 years ago
Figure out how to properly package / install static timing data files
Updated 7 years ago
Ethernet test fails to route (using 110% eastbound cross-connections)
Closed 7 years ago1
Timing analyer warns on all loops, not just combinatorial loops
Closed 7 years ago1
Correctly sort out debug/release/etc. build variants
Updated 7 years ago
Segfault in static timing analyzer
Closed 7 years ago4
Refactoring: Everything in gp4par/make_graphs.* should move to Greenpak4ParEngine
Updated 7 years ago
Refactoring: Rename Greenpak4Netlist*, possibly move to xbpar, since it's fairly free of GP4-specific code
Updated 7 years ago
Refactoring: Rename gp4par to "gpkpar" to reflect planned support for other GreenPAK device families
Updated 7 years ago1
gp4prog: print a more helpful message if there is a permission error
Updated 7 years ago
Regression from hidapi switchover: Multiple dev boards don't seem to work right
Closed 7 years ago4
Unused pull direction/drive should be configurable in the .pcf
Updated 7 years ago
if pdflatex fails, only "Error 1" is printed
Closed 7 years ago1
DCMP/PWM: Support for counter data as inputs
Closed 7 years ago
Support for counters with RC oscillator pre-divider of 12
Closed 7 years ago
Find a volunteer to pay the Apple tax
Closed 7 years ago1
Doesn't check if yosys is installed before trying to run it
Closed 7 years ago
build system: Make "distclean" target work
Closed 8 years ago2