NALLABALLE VENKATA ASHOK KUMAR's repositories
apll_01v8_sky130
This repository consists of ngspice simulation files and related files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—40MHZ to 100MHZ at 1.8v)IP worked on in the VSD Online Internship - Batch 3 in collaboration with Sky130 Open PDK by Google.
Radix-5-FFT
VERILOG IMPLEMENTATION OF RADIX-5 FFT
traffic_light_controller
Verilog Implementation of Traffic-light-controller
awesome-opensource-hardware
List of awesome open source hardware tools, generators, and reusable designs
bootstrap
bootstrap css file to enhance my html webpage
cores
Various HDL (Verilog) IP Cores
htmlandcss
INTERNSHALA ONLINE TRAINING
real_time_clock
Verilog Implementation of Real-time-clock
UART
Verilog Implementation of UART
oh
Verilog library for ASIC and FPGA designers
OpenSource_Physical_Design
This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
python_floating_conversions
this repository is for converting real numbers into floating point and vice versa in python
shell_Scripting
this repository contains some basic examples of Shell_Scripting
TCL-Scripting
Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference
TCL-Tk_scripting
This repository contains TCL/Tk scripting.
TensorFlow-Examples
TensorFlow Tutorial and Examples for Beginners (support TF v1 & v2)
verilog_Euclidean_distance_based_sorting
verilog implementation of euclidean based distance sorting
verilogbasiccodes
basic combinational and sequential verilog codes