Arash Fayyazi's repositories
AutoSA
AutoSA: Polyhedral-Based Systolic Array Compiler
BiLLM
BiLLM: Pushing the Limit of Post-Training Quantization for LLMs
BinaryViT
BinaryViT: Pushing Binary Vision Transformers Towards Convolutional Models
Building-Accelerated-Applications-with-Vitis
Support material for the Building Accelerated Applications with Vitis webinar series
CNN-using-HLS
Convolutional Neural Network Using High Level Synthesis
CSCI_596_Final_Project
CSCI 596 Final Project
dMazeRunner
dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
finn
Dataflow compiler for QNN inference on FPGAs
ftdnn
FPGA-tailored DNN
HiSparse
High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
MemTorch
A Simulation Framework for Memristive Deep Learning Systems
Nerual-Network-Acceleration-1
Neural Network Acceleration such as ASIC, FPGA, GPU, and PIM
Provable-Data-Subset-Selection-For-Efficient-Neural-Network-Training
Provable Data Subset Selection For Efficient Neural Network Training
SSR
SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
timeloop-accelergy-exercises
Exercises for exploring the Timeloop and Accelergy tools
timeloop-accelergy-tutorial
Docker container with tools for the Timeloop/Accelergy tutorial
Vitis_Libraries
Vitis Libraries