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alexforencich / verilog-ethernet

Verilog Ethernet components for FPGA implementation

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Can this IP support 100G Ethernet?

ChomperT opened this issue · comments

commented
commented

Unfortunately, the UDP stack itself only supports 8 bit and 64 bit datapaths, and 100G requires 512 bits. A few modules have been parametrized to support any width, but the whole stack has not yet been updated.