Query on configuring the ethernet for TX and RX operation???

[Dipal Halder]

Hi @alexforencich ,
I am trying to integarte one of your ethernet module (specifically eth_mac-10g_fifo) with my system on chip. In my SoC I have used the AXI4 as the system bus. I have my own wrapper and inside it, i am trying to integarte the above mentioned eth_mac module.
After integration of the ethernet module with the full system, I have written a firmware to test the TX and RX operation. From my firmware, I am providing the DATA value to the (tx_axis_tadat) which I should get in the xgmii_txd end. But I am not getting the DATA. And I am kind of thinking, the values that I am giving to configure ans start the ethernet operation is not correct.
I have taken the reference of values from your github page. I have attached below.

So, if I can give these values properly , the ethernet should work. Am I right or in this scenario, can you give any advise on the configuration register values for starting the operation.
I have been stuck in this problem for a several weeks and trying to debug signals. But did not get any good direction yet.
I will be waiting for your kind response.
Thank you @alexforencich
Regards
Dipal

[Alex Forencich]

Usually you won't connect a 10G MAC as a memory-mapped slave. Instead, it will be fed by a DMA engine of some sort. Otherwise, there is no way you're going to be able to get anywhere near 10 Gbps line rate.

The MAC doesn't really have any config registers per se, so yeah, if you provide packet data via AXI stream, it should send it. Without more info, I can't really provide any more useful information.