Armin Zare Zadeh's repositories
Algorithms
Algorithm and Data Structures
Async_FIFO_Verification
Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.
ACL_EZSIFT
ezSIFT based on ARM Computation Library (ACL)
CPP_OpenTLD
C++ implementation of TLD (Tracking, Learning, Detection) algorithm.
Elevator_Sys_Design
Elevator Algorithm Software System Design
Producer_Consumer
Typical producer/consumer system on multiple embedded processors
TWireSerIntrfc
A verification test case for a master implementation of the Two-Wire Serial Register Interface based on Systemverilog and UVM.
Pipeline_Processing
A conceptual Pipeline Processing Framework