Armin Zare Zadeh's repositories

Algorithms

Algorithm and Data Structures

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Async_FIFO_Verification

Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.

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HardORB

TCP/IP and UDP/IP protocol stack off-loading

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ACL_EZSIFT

ezSIFT based on ARM Computation Library (ACL)

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HybridIDP

Depth map computation for multiple-baseline stereo vision

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CPP_OpenTLD

C++ implementation of TLD (Tracking, Learning, Detection) algorithm.

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Elevator_Sys_Design

Elevator Algorithm Software System Design

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Producer_Consumer

Typical producer/consumer system on multiple embedded processors

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TWireSerIntrfc

A verification test case for a master implementation of the Two-Wire Serial Register Interface based on Systemverilog and UVM.

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Pipeline_Processing

A conceptual Pipeline Processing Framework

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