Aadeesh Jain's repositories
MIPS32_Processor
Implementation of MIPS32 processor in Verliog.
OLED_INTERFACING
A project on interfacing and displaying a string on OLED display of ZedBoard Zynq Evaluation and Development Kit.
Verilog
This repo contains different types of models and their testbenches in Verilog. It can be used for learing and practicing verilog.
Greatest_Common_Divisor
A program to calculate the Greatest Common Divisor(also called HCF) of two 16 bit numbers utilizing the datapath and controller design.
4_bit_Array_Multiplier
An Array multiplier which multiplies two 4-bit numbers implemented on ZedBoard Zynq Evaluation and Development Kit using Vivado Design Suite (version 2023.1).
Multiplication_By_Repeated_Addition
This repo is based Datapath and controller modeling using the example of Multiplication by repeated addition.
5_bit_Array_Multiplier
Implementation of an array multiplier in Verilog capable of multiplying two 5-bit numbers.
DeepLearningProject
Using Deep Learning techniques to classify Motor Imagery Electroencephalography (EEG) signals