渣渣基's repositories
sv_final_project
systemverilog课程大作业;对一个APB总线模块进行验证
flutter-in-action
《Flutter实战》电子书
DSP-homework
数字信号处理大作业
my_accelerator
本科毕设设计的基因测序加速器
seu-publicity-changeAvatar
校庆换头像(纯前端项目)
short-read-aligment-based-on-the-BWT
基于BWT的短序列比对和相关辅助数据的压缩
VLSI-homework
本科 VLSI 大作业
Language:C++MIT000
chisel-template
A template project for beginning new Chisel work
Language:ScalaUnlicense000
xilinx-summer-camp-project
xilinx暑期学校项目
digital_integrated_circuits_homework
研究生高等数字电路设计作业以及大作业
e203_hbirdv2
The Ultra-Low Power RISC-V Core
Language:VerilogApache-2.0000
herald-cas-redirect
rikumi服务器上的跳转
keras-retinanet
Keras implementation of RetinaNet object detection.
learnopencv
Learn OpenCV : C++ and Python Examples
Language:Jupyter Notebook000
MGPUSim
MGPUSim
Language:GoMIT000
nic-wechat-zxdt
网信公众号最新动态的列表页
Language:VerilogBSD-2-Clause000
NutShell
RISC-V SoC designed by students in UCAS
Language:ScalaNOASSERTION000
Python-Guide-CN
Python最佳实践指南。 The chinese translation of "Hitchhiker's Guide to Python".
seu-zccx-api
体育系的查询服务
SMEM_Fully_Pipelined_Design
SMEM++, A Fully Pipelined and Time-Multiplexed SMEM Seeding Accelerator for Genome Sequencing
Language:Verilog000
UString
[ACM MM 2020] Uncertainty-based Traffic Accident Anticipation
Language:PythonMIT000