YJMSTR's starred repositories

ncnn

ncnn is a high-performance neural network inference framework optimized for the mobile platform

Language:C++License:NOASSERTIONStargazers:19960Issues:572Issues:3458

XiangShan

Open-source high-performance RISC-V processor

Language:ScalaLicense:NOASSERTIONStargazers:4548Issues:93Issues:366

opencv-mobile

The minimal opencv for Android, iOS, ARM Linux, Windows, Linux, MacOS, WebAssembly

Language:C++License:Apache-2.0Stargazers:2360Issues:50Issues:86

onedriver

A native Linux filesystem for Microsoft OneDrive

Language:GoLicense:GPL-3.0Stargazers:1904Issues:23Issues:295

awesome-opensource-hardware

List of awesome open source hardware tools, generators, and reusable designs

Language:PythonLicense:MITStargazers:1831Issues:70Issues:15

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

Language:ScalaLicense:BSD-3-ClauseStargazers:1535Issues:84Issues:645

tinyriscv

A very simple and easy to understand RISC-V core.

Language:CLicense:Apache-2.0Stargazers:1040Issues:17Issues:8

black-parrot

A Linux-capable RISC-V multicore for and by the world

Language:SystemVerilogLicense:BSD-3-ClauseStargazers:579Issues:24Issues:410

vroom

VRoom! RISC-V CPU

Language:VerilogLicense:GPL-3.0Stargazers:466Issues:27Issues:8

micro-arch-training

How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

rohd

The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.

Language:DartLicense:BSD-3-ClauseStargazers:368Issues:15Issues:227

ara

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

Language:CLicense:NOASSERTIONStargazers:340Issues:23Issues:174
Language:C++License:NOASSERTIONStargazers:288Issues:4Issues:4

ruapu

Detect CPU features with single-file

Language:CLicense:MITStargazers:273Issues:6Issues:29

CircuitNet

CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)

Language:PythonLicense:BSD-3-ClauseStargazers:268Issues:7Issues:34

Bergamot

An exquisite superscalar RV32GC processor.

Language:ScalaLicense:Apache-2.0Stargazers:135Issues:3Issues:0

learning-journey

Chisel Learning Journey

Language:Jupyter NotebookLicense:GPL-3.0Stargazers:105Issues:6Issues:4

chisel-style-guide

A Style Guide for the Chisel Hardware Construction Language

typst-cv-miku

A simple, elegant, academic style CV template for typst. Support for English and Chinese (and more).

License:WTFPLStargazers:62Issues:1Issues:0

v4l2-examples

Video for Linux version 2 (V4L2) examples

Language:CLicense:MITStargazers:49Issues:2Issues:1

a2i

The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers

Language:VHDLLicense:NOASSERTIONStargazers:34Issues:6Issues:0

gtkwave-filter-process-RISC

A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave

Language:C++License:NOASSERTIONStargazers:24Issues:1Issues:0

ShanghaiTech-YSYX

Unofficial guide for ysyx students applying to ShanghaiTech University

riscv-rtthread-programming-manual

RISC-V编程指南 – 基于 RT-Thread 与 Milk-v duo

Language:PythonStargazers:7Issues:2Issues:0
License:BSD-3-ClauseStargazers:5Issues:0Issues:6

modern-cpp-tutorial

Modern cpp tutorial for Architecture simulator design

Language:C++Stargazers:4Issues:0Issues:0

computer-architecture-and-systems-resources

A curated list of Computer Architecture and Systems resources

License:CC0-1.0Stargazers:1Issues:0Issues:0
Language:VerilogStargazers:1Issues:0Issues:0