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Wonicon
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VerilogBlackBox
Convert Verilog module to chisel3 BlackBox
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Wonicon/VerilogBlackBox Issues
Support inout port type
Updated
3 years ago
Build Errors following the instructions
Closed
3 years ago
Comments count
1
Find out the clock signal and assign Clock() as its generator.
Closed
7 years ago
Beautify parameter expression
Updated
7 years ago