WeiCheng14159 / DLIC_2020

DLIC_2020

This is the repo for DLIC (Deep Learning IC Design), 2020 Fall in NCKU, Taiwan.

Language:Verilog 99.3%Language:Makefile 0.2%Language:Tcl 0.2%Language:Shell 0.1%Language:SystemVerilog 0.1%Language:Python 0.0%Language:Forth 0.0%