Wajahat Riaz's repositories
HandwrittenUrduCharacterRecognition
Handwritten Urdu Character Recognition in Machine Learning using Scikit-learn
WajahatRiaz
Config files for my GitHub profile.
Programming-Task
Course: Track for SOC/RV DV Module: Into to RISC-V Section: CALL
ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
SingleLabelTextClassification
Text Classification techniques are necessary to find relevant information in many different tasks that deal with large quantities of information in text form.
ComputerScienceI
Computer Science
Cores-VeeR-EH1
VeeR EH1 core
diagrammer
Provides dot visualizations of chisel/firrtl circuits
first-contributions
🚀✨ Help beginners to contribute to open source projects
icestudio
:snowflake: Visual editor for open FPGA boards
neorv32
🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
norse
Deep learning for spiking neural networks
oss-arch-gym
Open source version of ArchGym project.
riscv-csr-access
RISC-V CSR Access Routines
serv
SERV - The SErial RISC-V CPU
spytorch
Tutorial for surrogate gradient learning in spiking neural networks
super-gradients
Easily train or fine-tune SOTA computer vision models with one open source training library
sv-tests
Test suite designed to check compliance with the SystemVerilog standard.
verilog-axi
Verilog AXI components for FPGA implementation
verilog-pcie
Verilog PCI express components
verilog-uart
Verilog UART
verilog-wishbone
Verilog wishbone components