VenciFreeman

FFT_ChipDesign

A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.

RISC-V

A simple RISC-V CPU written in Verilog.

Compress

A simple image compression algorithm written in C++, and embedded implementation on Zynq.

Notes

My notes in Markdown.

BeforeSunrise

A custom Typora markdown theme.

Guetzli

Try to embed it on Zynq board.

SpiceAdders

A 16-bit carry skip adder and an unfinished Kogge-Stone adder.

LeNet

A simple DNN for handwritten numbers recognition. Written in C++, and optimized using Vivado HLS.

Passepartout

Multiways to solve TSP.

Platform

A simple shopping platform written in Java and HTML. Group project.

Arache

Some crawler tools in Python 3.7.

Aronnax

SJTU Artificial Intelligence Integrated Circuit Design Contest 2019 template.

Butteraugli

butteraugli estimates the psychovisual difference between two images

LaTeX_Template

Some LaTeX files as template.

StopWatch

A stop watch which can be connected to the monitor and controlled by keyboard via VGA cable.

VenciFreeman

ZynqLabs

Some labs based on Zynq.