VLSIDA / OpenRAM

An open-source static random access memory (SRAM) compiler.

Home Page:http://www.openram.org

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SKY130 SRAM Module Simulated at Very High Frequencies?

jackpanderson opened this issue · comments

Describe the bug
I have successfully gotten an SRAM module to fully synthesize using the OpenRAM tool, but am having some issues regarding power estimations and frequency. Our power estimations are in the range of hundreds of watts but for some reason, the simulation frequency has been set to 488 and 562 MHz. How are these frequencies determined, and can a specific frequency be specified? In the SKY130 tech file, the parameters for period and frequency are set to 100MHz (spice["feasible_period"] = 10 spice["default_event_frequency"] = 100), so why is the simulation frequency so much higher?

Version
1.2.12

Hi Jack,

The default is to use our analytical models which are not well calibrated. These are based on an Elmore or logical effort "linear" model for most delays. Please suggest improvements to the parameters to the tech file if you see some issues.

If you enable characterization, it starts with a 10ns period but adjusts to find the actual one using a bisection search (or doubling it if 10ns isn't feasible).

The 100 is actually a percentage for the toggle rates to calculate dynamic ower. The name should be improved. It assumes 100% toggle rates (possibly a bad default value) unless a module over-rides it.