Hey this is my studing repository.
- 1 Simple adder and testbench for him.
- 2 Simple syncronous adder and testbench for him.
- 3 Sequential divider (8 bits but can to extend) (8 bits/8 bits; dividing 8 cycles).
- 4 Simple ALU.
- 5 PWM modulator (8 bits).
- 6 CPU1 - Realisation of CPU architecture based on described in C.Petzold's book "Code: The Hidden Language of Computer Hardware and Software" computer architecture.
- 7 ECC - parametrized Hamming's Error code correction module.
- 8 MIPS32_SingleCycle - My simple realization of Single Cycle MIPS architecture with educational purposes. Realised litle part of ISA. Based on D.A. Patterson's and J.L. Hennesy's book - "Computer organization and design"
- 9 MIPS32_Pipelined - My simple realization of 5 stage Pipelined MIPS architecture with educational purposes. Realised litle part of ISA. Based on D.A. Patterson's and J.L. Hennesy's book - "Computer organization and design"