Brian Cheng's repositories
ANC_System
Senior design project: FPGA active noise cancellation system.
uvm-testbench-tutorial-simple-adder
A basic testbench made for educational purposes using SystemVerilog and the Universal Verification Methodology
cupy
NumPy & SciPy for GPU
Language:PythonMIT000
cvxpy
scratchpad cvxpy
Language:Python000
ece509-final
ECE509 Convex Optimization Final
Language:Jupyter Notebook000
FPGA-LCD-Driver-128x64-HelloWorld
VHDL driver for 128x64 monocolor LCD dot matrix (ST7920 IC)
FPGA-OnBoard-RGB-LEDs-ColorCycleAnimation
cycles the two on-board RGBs through the full color cycle
Julia_Morph
A simple CUDA/C++ application to visualize and animate Julia Sets in real-time.