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TheRainstorm / LongXinCup

A MIPS CPU softcore using verilog

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nscscc2019

  1. rtl: CPU rtl codes
  2. coe: simulation test files
  3. labs: three experiments codes

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A MIPS CPU softcore using verilog

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Language:Verilog 53.2%Language:Assembly 39.5%Language:SystemVerilog 6.4%Language:C++ 0.6%Language:C 0.4%