TargetIt / soc

record tech about system on chip

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soc

Used to record my SoC design experience

Tools

https://www.veripool.org/
https://www.edaplayground.com/
https://www.shiyanlou.com/

http://www.asic-world.com/
http://www.asic-world.com/verilog/tools.html

IPs

SoCs

  • ARM designstart
    • A demo SoC
    • system testbench example
    • simulation environment
      • compile the test code
      • compile the RTL
      • run the simulation
    • Software Examples
      • driver files
      • retargeting
    • Implementation
      • constraints
      • synthesis
      • dft
  • Risc-v
    *

About

record tech about system on chip


Languages

Language:Verilog 57.8%Language:SystemVerilog 21.8%Language:Shell 13.1%Language:Makefile 7.0%Language:Forth 0.2%