Talha Abdulaziz's repositories
cacheSimulator
Simulation of one level of cache performance, given a sample set of memory address traces (MATs). The configuration can be modified in order to determine the optimal configuration based on the MAT files, which are in ASCII. The memory of the system is 32 bits, where the parameters vary based on the associativity level, number of blocks and rows.
MIPS_CPU
MIPS CPU Implementation in VHDL
Shift-Cipher-Decoder
Python script that retrieves a piece of ciphertext and decodes the plaintext if it is encoded using a shift-cipher.
AES
Advanced Encryption Algorithm method of encoding a 128-bit plaintext along with an 8-byte key.
Vigenere-Cipher
Vigenere cipher decoder using Kerckhoff’s method. Determines key length and key where no key is provided
ALU
8-bit ALU
djangocrashcourse
Very simple Django blog app for crash course
audio-router
Routes audio from programs to different audio devices.
Lora
Hardware / Software source about Lora
django-d3-example
Sample project to help who want to integrate D3 getting data from Django.