Tairycy's repositories
sigma_delta_converters
Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
Cardinal-NIC-and-Chip-Multiprocessor
Cardinal NIC and Chip Multiprocessor
Computer-Science-Textbooks
Collect some CS textbooks for learning.
CORDIC
Hardware and software CORDIC algorithm implementation
Cycle-accurate-Eyeriss-model
A scalable Eyeriss model in SystemC.
d2l-zh
《动手学深度学习》：面向中文读者、能运行、可讨论。中英文版被55个国家的300所大学用于教学。
DSM_WITH_ECG
Verilog-A/AMS simulation model for a second order Delta-Sigma Modulator based on "Understanding Delta-Sigma Data Converters" by Richard Schreier. The input signal to the simulation model is an ECG data set.
fp-aud-smartmic1
FP-AUD-SMARTMIC1 provides a firmware running on STM32 which acquires audio signals of four digital MEMS microphones, elaborates them by means of embedded DSP libraries and streams the processed audio to both an USB host and a loudspeaker connected to the relevant expansion board.
Image-Denoising
This Contains Verilog Code for Image Denoising using Median Filtering
isppipeline_Python
isppipeline_Python
jelly
Original FPGA platform
LLVM_for_cpu0
This is a tutorial to learn LLVM, I realize a backend to compiler machine code for cpu0 which is a simple RISC cpu.
python_howling_suppression
A Python example For Acoustic Howling Suppression
Rasterix
OpenGL 1.x implementation for FPGAs
ruankao
目前全网最全面的2022年系统架构设计师（软考高级）备考资源库。仅供个人学习，请勿用于商业
speech-enhancement-psr
Speech enhancement using Wiener filtering and pitch-synchronous STFT phase reconstruction
stockdb
Stock data collecting and analyzing
x-cube-memsmic1
X-CUBE-MEMSMIC1 provides examples running on STM32 for the acquisition of ST analog and digital MEMS microphones. It also includes an example of ultrasound condition monitoring (UltrasoundFFT). It exploits also the Performance Mode of the MP23DB01HP MEMS digital microphone available on the STEVAL-MIC006V1 board.