Tobias Markus's repositories
awesome-hwd-tools
A curated list of awesome open source hardware design tools
VerilogModules
generic Verilog modules for reuse...
aoc23
Advent of Code in Zig
Language:ZigMIT000
ErrorInjection
Inject errors in the configuration of an fpga via jtag
GameofLife_Python
Conways Game of Life in Python
logbook
A simple sql based bash history
Language:Go000
MISC_Processor
A "keep it simple stupid" 32 Bit Processor in VHDL
Language:VHDL000
Modelsim_SEE_Inject
A tcl extension to simulate Single Event Effects (SEEs) SEUs and SETs in Modelsim Simulations
Language:VHDL000
VerilogExercise
Verilog Exercises for University
Language:Verilog000