Tom Szymkowiak's repositories
pikuma_computer_graphics
Computer graphics programming course from https://pikuma.com/courses/learn-3d-computer-graphics-programming
axi_components
A mixture of AXI components and tests
cv32e40p_tuni_fpga
FPGA based CV32E40P platform for use on TUNI projects.
FRiscV
RV32I Implementation
jtag_vpi
TCP/IP controlled VPI JTAG Interface.
linux_kernel_drivers
Repo to practice writing Linux kernel drivers
pulp_axi
Forked repo of AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
pulp_common_cells
Common SystemVerilog components
pulp_common_verification
SystemVerilog modules and classes commonly used for verification
pulpissimo
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
sync_fifo
Synchronous FIFO implemented in VHDL
tau-latex-thesis-template
A LaTeX template for Tampere University theses in the fields of technology
timing_constraints_testbed
project to practise defining timing constraints on FPGA
UARTMonitor
Command line tool to monitor UART comms using USB to RS232
uvmprimer
Contains the code examples from The UVM Primer Book sorted by chapters.
VGA_Controller
VGA controller written in VHDL (targeted at Digilent Arty A7-100T)
Vitis-Tutorials
Vitis In-Depth Tutorials
vivado_cutom_ip
testing creation of a custom AXI peripheral to be used with a Zynq