Shivani Gupta's starred repositories
FPGA-Audio-Effects-System
FPGA Audio Effect System project for Electronic Engineering course. This project spanned two semesters and was my final year project
RISC_V_architecture_design
designing RISC-V architecture using Verilog HDL in XILINX VIVADO PC SUITE
Mobile-Charger
Mobile Charger project using Verilog in Xilinx Vivado targeting the Basys3 FPGA Board
8_Bit_Counter
8-Bit Counter created using Verilog on Xilinx Vivado.
fsm_calculator
A finite state machine controlled calculator written using Verilog in Xilinx Vivado targeting the Nexys 4 DDR FPGA Board
CMOSRippleCarryAdder
An 8-bit Ripple Carry Adder designed with CMOS technology using Cadence Virtuoso
Layout-Design-of-an-8x8-SRAM-array
The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout design is done using Cadence Virtuoso’s ADE, & the Static Noise Margin is obtained through Matlab scripts.
Number_Plate_Recognition_System
Reading Car's Number Plate using Image Processing in MATLAB
Electronic-Voting-Machine
A verilog based project. EVM with a verification system.