Saviour Owolabi (Seyviour)

Seyviour

Geek Repo

Location:Lagos, Nigeria

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Saviour Owolabi's repositories

fpga_spectrometer

An FPGA Spectrometer!

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ElizaChat

Eliza chatbot on Android

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pidgin-snmt

Neural Machine Translation from Nigerian Pidgin English to English aided by SMT Word Alignments

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divx

Information at the tip of your pen.

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fft_hdl

An implementation of the Fast Fourier Transform in Verilog

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log-fp8

Exploration of logarithm-based FP8 computation in hardware

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nestang

NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards.

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nextpnr

nextpnr portable FPGA place and route tool

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riscv_pipelined

A pipelined (partial) implementation of the RV32I specification

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apicula

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

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asic_maze_router

A (toy) Implementation of mazerouting for two-layer ASIC nets

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bram-infer

bram inferring

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broadcast-riscv

A broadcast/listener RISC-V implementation.

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divx-android

Demo Android app to interface with a divx-scanner

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edalize

An abstraction library for interfacing EDA tools

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esp-idf

Espressif IoT Development Framework. Official development framework for Espressif SoCs.

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fpga-comm-protocols

Implementations of FPGA communication protocols in Verilog and VHDL

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lxnked-pdf.js

PDF Reader in JavaScript

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Open-Source-Broadcasting

A collection of open source software tools I found useful while I worked in a broadcast house.

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pesto-rtl

RTL implementation of Sony CSL's Pesto model for pitch estimation

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picture_merge

Bash script that uses FFmpeg to concatenate multiple pictures into a video (including pan/zoom animations)

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q_placer

A toy implementation of a placer based on the Quadratic Wirelength Model, with recursive partitioning implemented.

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sdram-tang-nano-20k-os-example

NESTang SDRAM controller and usage example for Tang Nano 20K. This fork only shows how to get the SDRAM working via the open source toolchain.

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synlig

SystemVerilog support for Yosys

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terosHDLdoc

TerosHDL documentation

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test

test

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udemy_vhdl_thermostat

Toy VHDL description of the logic of a typical thermostat. Follows Udemy's "Introduction to VHDL for ASIC and FPGA design"

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urp-boolean-algebra-evaluator

A Boolean Algebra Evaluation Engine (Implementation follows description from Coursera's "VLSI CAD Part 1: Logic" taught by Professor Rutenbar

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