Shidong Shen's repositories
NWPU_Latex_Template
Latex Template for Northwestern Polytechnical University(NWPU) Report
SQL_memOJi
Grad Project, OJ of SQL
ISSPA_Studio
A foxglove based ISS Platform
btormcTools
Some tools for reading btormc outputs
ChatGPT-Next-Web
One-Click to deploy well-designed ChatGPT web UI on Vercel. 一键拥有你自己的 ChatGPT 网页服务。
setup-btormc
Tool for install Btormc env
nutshell-fv
RISC-V SoC designed by students in UCAS
agile-hardwire-design
Lectures for the Agile Hardware Design course in Jupyter Notebooks
chisel-formal-verification
Formal verification tools for Chisel and RISC-V
ChiselQueue
A Simple Queue using chisel
console
KubeSphere Console for ISSPA
difftest
Co-simulation framework for Xiangshan
hello-algo
《Hello 算法》：动画图解、一键运行的数据结构与算法教程，支持 Java, C++, Python, Go, JS, TS, C#, Swift, Rust, Dart, Zig 等语言。
microrv32
SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype
pono
Pono: A flexible and extensible SMT-based model checker
riscv-boom
SonicBOOM: The Berkeley Out-of-Order Machine
riscv-mini-formal
A formal verification try for riscv-mini(Simple RISC-V 3-stage Pipeline in Chisel)
rocket-chip
Rocket Chip Generator
SeddonShen
Config files for my GitHub profile.
SingleTLB
Verification on NutShell single TLB
smt-switch
A generic C++ API for SMT solving. It provides abstract classes which can be implemented by different SMT solvers.
SpecCore_AXI
RISC-V Specification Core in Chisel with AXI Bus.
tech-interview-handbook
💯 Curated coding interview preparation materials for busy software engineers
ucas_course_to_calendar
把课表导入手机日历的脚本
vercel-proxy
vercel-proxy