CADC-F14-Tomcat

i doubt this will go anywhere, or even compile if i get that far.

idk, thought it would be fun to replicate the CADC microprocessor from the F-14 Tomcat in Verilog the CADC isn't really a microprocessor, it's rather a collections of multiple ICs that created a "microprocessor" designed for a specific task, and calling it a microprocessor is a strech. basically, I'd like to make a general purpose 20-bit microprocessor, inspired by the CADC, combining all ICs into one chip. a real modern day 20-bit ASIC would be epic. would be cool to imagine if history was different and a 20-bit computer was developed off the back of the F-14 program. I'd love to see what kind of stuff you could render with a 20-bit pipline, it's interesting as heck.

this is an extremely difficult project with tons of liberties taken from a lack of information/documentation. reverse engineering the die photos instead of relying on the reports/manuals information, will be the most accurate path to creating a CADC and generalizing a system.

ideally, you would have two branches, the CADC and the CATC. the CADC branch is a pipe dream, while the CATC branch could be done with many liberties taken.

CADC Branch

A one-to-one, pure verilog implementation of the entire CADC system. You would need PMOD hardware for A/D, Sensors, and vendor specific stuff for a demo.