Sachin19 / RISC

Reduced Instruction Set Computer - for Xilinx FPGA Spartan 5

RISC

Reduced Instruction Set Computer - for Xilinx FPGA Spartan 5

Course Project for CS31001 : Computer Organization and Architecture at IIT Kharagpur (2013)

Reduced Instruction Set Computer - for Xilinx FPGA Spartan 5

Language:C 55.4%Language:HTML 25.9%Language:Verilog 11.6%Language:VHDL 5.6%Language:Tcl 1.6%Language:Batchfile 0.0%