Shane Fleming's repositories
emsys_21A_cw
Coursework handout for EmSys Autumn 2021
emsys_21a_wcet
Repository for the EmSys CSC368/M68 lecture on Worst Case Execution Time
EmSys_Hardware_Description_Languages
This lecture introduces hardware description languages (Verilog).
xeus-on-pynq
Helps setup a PYNQ Xeus-cling environment on the KV260.
AIEKernelBuilder
A package that builds upon Riallto but focuses on improving the developer experience for single AIE Kernels.
EmSys_21A_lab3
Repository for the third EmSys lab handout
emsys_21A_lab4
The fourth lab for the embedded system course, introduces some basic digital hardware design with Verilog and Verilator.
EmSys_Power
EmSys lecture on power consumption
EmSys_Power_and_CW
EmSys (CSC368/M68) lecture on power consumption in embedded systems
EmSys_Sequential_Logic
Lecture for the Embedded Systems Design course (CSC368/M68) on sequential logic design with Verilog
EmSys_Worst_Case_Execution_Time
Repository for EmSys (CSC368) lecture 3
finn
Dataflow compiler for QNN inference on FPGAs
finn-hlslib
Vitis HLS Library for FINN
mlir-aie
An MLIR-based toolchain for AMD AI Engine-enabled devices.
octo
Octo is a transformer-based robot policy trained on a diverse mix of 800k robot trajectories.
PYNQ-HelloWorld
This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
PYNQ_Composable_Pipeline
PYNQ Composabe Overlays
pyverilator
Python wrapper for verilator model
Riallto
The Riallto Open Source Project from AMD
stfleming.github.io
academic page for stfleming
tclwrapper
Python wrapper to interact with TCL command line interfaces