Reconfigurable-Computing

Xilinx-FPGA-PCIe-XDMA-Tutorial

Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

HLStoFPGA

Vitis_workflow

Vitis 部署加速器工作流介绍

Automata-Compiler

flex_BRAM_FPGA

Verilog module for flexible instantiation of ROM/RAM of arbitrary depth and bit width. Automatically reduce BRAM usage through depth division, bit width division, and bit width folding.

HLS-Open-CV-Demo

Hardware-friendly-PACT-Quantization

Xilinx-INT8-Multiplication-Optimization

Compress-C3D-With-Block-Circulant-Matrix

DataflowAnalysisBasedOnSpatialTimeTransfomation

QuSimPy

A Multi-Qubit Ideal Quantum Computer Simulator

fpga24_routing_contest

Runtime-First FPGA Interchange Routing Contest @ FPGA’24

RapidWright

Build Customized FPGA Implementations for Vivado