Relay2Tetris
In 2019, I had the great privilege of being able to see the FACOM 128B computer in operation at Fujitsu's company museum. Delving into the technical details of how this machine worked only increased my admiration for the engineers who designed it. This has inspired me to create my own relay-based computer as a hobby project.
A few years prior I was introduced to the Nand2Tetris course, which I highly recommend. The HACK CPU that students implement in the course is a masterpiece of minimalist CPU design, so it was a natural target for my ambitions.
The goal of this project is to completely implement the HACK CPU in relay logic, and also to provide other relay-computer builders with a set of standard board-level relay logic CPU components, such as registers, adders, and so on.
August 2020 Project Status Video
Project Reports
- Conversion of the idealized HACK CPU architecture to a physical model that addresses timing considerations.
- Component-level HACK simulator.
- 40-Channel Daisy-chainable Raspberry Pi IO Expansion Board.
- The War on Voltage Drop.
- Register Board.
- Zuse Adder/Subtractor/Incrementor.
- 8 Function Boolean Logic Unit.
- 2:1 Mux + NOT / Breadboard.
- Arithmetic-Logic Unit.
Reference Files
- Useful EasyEDA scripts.
- [Hardware Test scripts)(HardwareTests).
- Gerber Files for all boards.
- Bills of Materials for all boards. (Note: does not include optional components like relay coil voltage drop resistors, voltage regulators, etc., as they will rarely if ever be needed. BOMs are for fully-populated boards including any breadboard relays)
- Datasheets for various hardware components.
- YouTube project playlist.
The fleshing-out of this archive is an ongoing project; please be patient with the author.
Recent Update History
2020-08-17: Assembled and tested the Arithmetic-Logic Unit.
2020-08-06: Updated all the board design documents, improved the hardware tests, did some project cleanups. Added a project status video.
2020-07-20: Launched the War on Voltage Drop. Redesigned all boards based on the results (see individual board pages for details). Created new IO Expander Daughterboard. Added BOMs for all boards.
To-Do List
- Clock and Sequencer - in design.
- Program Counter & Branch Unit - in assembly.
- Program ROM and RAM - optional, may design as proof of concept.
Surplus Board Availability
Due to minimum quantity requirements, I have extras of most of the various versions of the various boards. If you want one, email me at trebor@animeigo.com and we'll work something out.
Acknowledgements
Given that I am a programmer by trade, and thus a clueless n00b at hardware design, I am indebted to those who know better than me, including, but not limited to:
Harry Porter's Relay Computer Project and Technical Paper
FACOM 128B Information:
- http://museum.ipsj.or.jp/en/computer/dawn/0012.html
- https://hackaday.com/2019/12/06/visiting-the-facom-128b-1958-relay-computer/
The complete Nand2Tetris course can be found at: https://www.nand2tetris.org/
License
The materials in this repository (except for those provided by outside sources) are licensed under the Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).