RISCuinho

RISCuinho

Geek Repo

**RISC**uinho - A scratch in the possibilities in the universe of microcontrollers

Location:Brazil

Home Page:https://riscuinho.github.io/

Twitter:@verilognize

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RISCuinho's repositories

core

**RISC**uinho - A scratch in the possibilities in the universe of microcontrollers

License:BSD-3-ClauseStargazers:20Issues:2Issues:58

LibFPGA

Minha biblioteca de módulos útil a qualquer projeto com FPGA, de PLL, Gerador de números pseudo aleatórios, controladores externos, entre outros.

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awesome-fpga-boards

Second life for FPGA boards which can be repurposed to DYI/Hobby projects

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riscuinho.github.io

A scratch on Microcontroller universe

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apicula

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

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exemplos

Exemplos usados para teste do RISCuinho, os códigos são em assembly ou C/C++, detalhes podem ser obtidos no em https://riscuinho.github.io/categories/exemplos

Language:AssemblyLicense:CC0-1.0Stargazers:0Issues:0Issues:0

gowin-easy-linux

Easy setup of GoWin FPGA SDK on Linux. A single script (main_launcher) automates all the critical steps and quickly fires up the IDE.

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nextpnr

nextpnr portable FPGA place and route tool

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SIMULinho

Simulador integrado iVerilog com interface QT, permite visualizar internamente e controlar a simulação do RISCuinho usando iVerilog

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verilog-support

Edit SystemVerilog files (and UVM files) in Vim/gVim

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verilog_systemverilog.vim

Verilog/SystemVerilog Syntax and Omni-completion

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yosys

Yosys Open SYnthesis Suite

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apio-examples

:seedling: Apio examples

License:GPL-2.0Stargazers:0Issues:0Issues:0

arachne-pnr

Place and route tool for FPGAs

License:MITStargazers:0Issues:0Issues:0

chocopy

ChocoPy website

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Digital

A digital logic designer and circuit simulator.

License:GPL-3.0Stargazers:0Issues:0Issues:0

emulsiV

A visual simulator, criado por @Guillaum Savaton, for teaching computer architecture using the RISC-V instruction set

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iverilog

Icarus Verilog

License:GPL-2.0Stargazers:0Issues:0Issues:0

magic_enum

Static reflection for enums (to string, from string, iteration) for modern C++, work with any enum type without any macro or boilerplate code

License:MITStargazers:0Issues:0Issues:0

riscv-binutils-gdb

RISC-V backports for binutils-gdb. Development is done upstream at the FSF.

License:GPL-2.0Stargazers:0Issues:0Issues:0

riscv-eabi-spec

Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.

License:CC-BY-4.0Stargazers:0Issues:0Issues:0

riscv-formal

RISC-V Formal Verification Framework

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riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC

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riscv-v-spec

Working draft of the proposed RISC-V V vector extension

License:CC-BY-4.0Stargazers:0Issues:0Issues:0

tang-nano-psram

A test of the PSRAM on the Sipeed Tang Nano

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venus

RISC-V instruction set simulator built for education

License:MITStargazers:0Issues:0Issues:0