Narsepalli Pradyumna's repositories
FPGA_Workshop_VSD
This Repo is a part of a 5-Day Workshop conducted by VLSI System Design (VSD) and the contents are divided Day wise for better understanding.
Language:VerilogApache-2.0000
caravel_user_project
https://caravel-user-project.readthedocs.io
Language:VerilogApache-2.0000
Language:Jupyter NotebookMIT000
Pradyumna1312
My Personal Config Repo
000
xamarin-forms-samples
Sample apps built using the Xamarin.Forms framework
NOASSERTION000