Dongho Park's repositories
AstroNvim
AstroNvim is an aesthetic and feature-rich neovim config that is extensible and easy to use with a great set of plugins
aws-fpga
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
chipyard-polynet
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
chisel
Chisel: A Modern Hardware Design Language
chisel-book
Digital Design with Chisel
chisel-bootcamp-kr
Generator Bootcamp Material: Learn Chisel the Right Way
chisel-dev-env-installer
Development Environment Installer for Chisel and Chipyard
chiseltest-xsim
The batteries-included testing and formal verification library for Chisel-based RTL designs.
chiselverify-polynet
A dynamic verification library for Chisel.
diagrammer
Provides dot visualizations of chisel/firrtl circuits
firrtl-spec
The specification for the FIRRTL language
llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
ParkDongho
Config files for my GitHub profile.
riscv-isa-manual
RISC-V Instruction Set Manual
rocket-chip-polynet
Rocket Chip Generator
scala-parser-combinators
simple combinator-based parsing for Scala. formerly part of the Scala standard library, now a separate community-maintained module