Beast code in Giters

Oscar Van Slijpe's starred repositories

factorio-server-manager

A tool to help manage Factorio multiplayer servers including mods and save games.

Language:GoMIT54700

fastapi

FastAPI framework, high performance, easy to learn, fast to code, ready for production

Language:PythonMIT7445300

Raspberry-Pi-Dashboard

Web-App Dashboard to monitor Raspberry Pi hardware and software status. Nothing more than Webserver + PHP required.

Language:PHPGPL-3.025500

EasyOCR

Ready-to-use OCR with 80+ supported languages and all popular writing scripts including Latin, Chinese, Arabic, Devanagari, Cyrillic and etc.

Language:PythonApache-2.02315800

awesome-python

An opinionated list of awesome Python frameworks, libraries, software and resources.

Language:PythonNOASSERTION21504800

RISC-V-CPU

A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.

Language:Verilog10000

ocreeb-mk-2

Modular Macro Keyboard System

Language:PythonNOASSERTION37600

factorio-riscv

riscv cpu implementation in factorio combinators

Language:Assembly1900

discord-oauth2.py

API Wrapper for Discord OAuth2 & Linked Roles in Python.

Language:PythonMIT3700

passport-cas

Cas authentication strategies for Passport.

Language:JavaScript4400

discord-linked-roles

A basic wrapper for the Discord Linked Roles OAuth2 API.

Language:PythonMIT2400

cheritree

Snapshot of the three implementations (in Sail, Proteus and Morello, respectively) discussed in our EuroS&P 2023 paper "CHERI-TrEE: Flexible enclaves on capability machines"

Language:Coq300

sancus-riot

A Sancus-enabled version of the RIOT OS with protected scheduler enclave and certain availability guarantees.

Language:CNOASSERTION500

tremor

React components to build charts and dashboards

Language:TypeScriptApache-2.01600500

Chart.js

Simple HTML5 Charts using the <canvas> tag

Language:JavaScriptMIT6413600

Toooba

RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT

Language:VerilogNOASSERTION15700

cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Language:AssemblyNOASSERTION218500

riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

80900

ESP-DASH

Blazing fast library to create a functional dashboard for ESP8266 / ESP32

Language:C++GPL-3.094600

ArduinoMenu

Arduino generic menu/interactivity system

Language:C++LGPL-2.193500

ESP32-BLE-Gamepad

Bluetooth LE Gamepad library for the ESP32

Language:C++NOASSERTION101400

litex-boards

LiteX boards files

Language:PythonBSD-2-Clause36400

linux-on-litex-vexriscv

Linux on LiteX-VexRiscv

Language:PythonBSD-2-Clause56000

litex

Build your hardware, easily!

Language:CNOASSERTION283500

mrpack-install

Modrinth Modpack server deployment

Language:GoMIT12700

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

Language:AssemblyMIT237000

goossens-book-ip-projects

this repository contains all the ip projects presented in the HLS/RISC-V/Computer Architecture book written by Goossens and published by Springer

Language:VHDL2000

chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

Language:ScalaBSD-3-Clause152700

riscv-sodor

educational microarchitectures for risc-v isa

Language:ScalaNOASSERTION66200

riscv-mini

Simple RISC-V 3-stage Pipeline in Chisel

Language:ScalaNOASSERTION52500