Nidhinchandran47

Nidhin Chandran's repositories

my_rtl_code

Repository for RTL building blocks #100daysofrtl VERILOG VHDL System Verilog

Language:Verilog10 1 1

NxN-network-on-chip

implementation of a 5 port router

Language:Verilog5 10

flotadder

This is the VHDL code for a floating point adder

Language:VHDL3 10

mac_unit

This is a 4 bit MAC unit ,which is the basic unit of matric multiplier used in TPU

Language:VHDL3 10

DV200

A go-to repository for exploring, learning, and mastering RTL design and verification.

Language:Verilog200

The HDL Bits Solutions repository provides answers to the HDL Bits exercises, which are designed for practicing digital hardware design using Verilog HDL. Join us to learn, share, and master digital design!

Language:Verilog200

4-bit-alu

This is the verilog code for a 4bit arithmetic and logic unit which can do 8 operations

Language:Verilog1 10

MIPS_testbench_generator

A MIPS based microprocessor and a python script for automatic generation of testbench corresponding to the input assembly file

Language:Verilog100

Nidhinchandran47

Config files for my GitHub profile.

1 10

nielit

miniproject done at nielit calicut while a workshop on fpga architecture

Language:Verilog1 10

aras

ARAS-AUTOMATIC REMOTE AQUAPONIC SYSTEMS

Language:C++010

EV-High-Efficiency-Boost-Converter

This is a high-efficiency boost converter designed for quicker charging of electric vehicles.Prototype 1.

000

markdown-cheatsheet

Markdown Cheatsheet for Github Readme.md

MIT000

mips32

Verilog implementation of a mips32 processor

Language:Verilog010